DE0 Development Board

By Terasic Inc. 112

DE0 Development Board

Terasic Technologies, Inc.'s DE0 Development and Education board is designed in a compact size with all the essential tools for novice users to gain knowledge in areas of digital logic, computer organization, and FPGAs. It is equipped with Altera Cyclone III 3C16 FPGA device, which offers 15,408 LEs. The board provides 346 user I/O pins, and is loaded with a rich set of features. This makes it suitable to be used for advanced university and college courses, as well as the development of sophisticated digital systems. The DE0 combines the Altera low-power, low-cost, and high performance Cyclone III FPGA to control the various features of the DE0 Board. The DE0 Development Board includes software, reference designs, and accessories required to ensure the user simple access in evaluating their DE0 Board.

  • Cyclone III 3C16 FPGA
    • 15,408 LEs
    • 56 M9K Embedded Memory Blocks
    • 504K total RAM bits
    • 56 embedded multipliers
    • 4 PLLs
    • 346 user I/O pins
    • FineLine BGA 484-pin package
    • One 8-Mbyte Single Data Rate Synchronous Dynamic RAM memory chip
  • Flash memory
    • 4-Mbyte NOR Flash memory
    • Support Byte (8-bits)/Word (16-bits) mode
    • Provides both SPI and SD 1-bit mode SD Card access

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