ADC3241IRGZR

Mfr. #:: ADC3241IRGZR
Сипаттама:: Analog to Digital Converters - ADC Dual 14-bit 25 Msps SLVDS ADC
Өміршеңдік кезең:: Осы өндірушіден жаңа.
Деректер тізімі:: ADC3241IRGZR Деректер тізімі
Жеткізу:: DHL FedEx Ups TNT EMS
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ECAD Model:
Көбірек ақпарат:: ADC3241IRGZR Көбірек ақпарат ADC3241IRGZR Product Details

Өнім атрибуты
Төлсипат мәні

Өндіруші:: Texas Instruments

Өнім санаты:: Аналогты сандық түрлендіргіштер – ADC

RoHS:: Y

Серия:: ADC3241

Орнату стилі:: SMD/SMT

Пакет/қорап:: VQFN-48

Интерфейс түрі:: Сериялық LVDS

Ең төменгі жұмыс температурасы:: - 40 C

Максималды жұмыс температурасы:: + 85 C

Қаптама:: Ролик

Мүмкіндіктер:: Төмен қуат

Қуат тұтынуы:: 120 mW

Бренд:: Texas Instruments

ENOB - биттердің тиімді саны:: 12 Bit

Ылғалға сезімтал:: Иә

Өнім түрі:: ADC – аналогты сандық түрлендіргіштер

SFDR - жалған бос динамикалық диапазон:: 93 dB

SINAD - сигналдың шу мен бұрмалану қатынасы:: 73.9 dB

Зауыттық буманың саны:: 2500

Ішкі санат:: Деректерді түрлендіргіш IC

Tags: ADC3241I, ADC3241, ADC324, ADC32, ADC3, ADC

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ADC3241IRGZR Сипаттама

***as Instruments: Dual-Channel, 14-Bit, 25-MSPS Analog-to-Digital Converter (ADC) 48-VQFN -40 to 85

***et Europe: ADC Dual Pipelined 25Msps 14-bit LVDS/Serial 48-Pin VQFN T/R

***ark: Dual 14-bit 25 Msps SLVDS ADC's

***i-Key: IC ADC 14BIT PIPELINED 48VQFN

***as Instruments (TI): The ADC324x are a high-linearity, ultra-low power, dual-channel, 14-bit, 25-MSPS to 125-MSPS, analog-to-digital converter (ADC) family. The devices are designed specifically to support demanding, high input frequency signals with large dynamic range requirements. An input clock divider allows more flexibility for system clock architecture design and the SYSREF input enables complete system synchronization. The ADC324x family supports serial low-voltage differential signaling (LVDS) in order to reduce the number of interface lines, thus allowing for high system integration density. The serial LVDS interface is two-wire, where each ADC data are serialized and output over two LVDS pairs. An internal phase-locked loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock that is used to serialize the 14-bit output data from each channel. In addition to the serial data streams, the frame and bit clocks are also transmitted as LVDS outputs.

ADC3241IRGZR Көбірек ақпарат

ADC324x 14-Bit Analog-to-Digital Converters: OMO Electronic ADC324x 14-Bit Analog-to-Digital Converters (ADCs) are a high-linearity, ultra-low power, dual-channel, 14-bit, 25-MSPS to 125-MSPS ADC family. The devices are designed specifically to support demanding, high input frequency signals with large dynamic range requirements. An input clock divider allows more flexibility for system clock architecture design and the SYSREF input enables complete system synchronization. The ADC324x family supports serial low-voltage differential signaling (LVDS) in order to reduce the number of interface lines, thus allowing for high system integration density. The serial LVDS interface is two-wire, where each ADC data are serialized and output over two LVDS pairs. An internal phase-locked loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock that is used to serialize the 14-bit output data from each channel. In addition to the serial data streams, the frame and bit clocks are also transmitted as LVDS outputs.

ADC3x High-Speed 12/14-Bit ADCs: Texas Instrument ADC3x High-Speed 12/14-Bit Analog-to Digital Converters are a high-linearity, ultra-low power, dual-channel, 12 or 14-bit, 25-MSPS to 125-MSPS, analog-to-digital converters (ADCs). These devices are designed specifically to support demanding, high input frequency signals with large dynamic range requirements. An input clock divider allows more flexibility for system clock architecture design and the SYSREF input enables complete system synchronization. The ADC3x supports serial low-voltage differential signaling (LVDS) in order to reduce the number of interface lines, thus allowing for high system integration density. The serial LVDS interface is two-wire, where each ADC data are serialized and output over two LVDS pairs. An internal phase-locked loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock that is used to serialize the 12 or 14-bit output data from each channel.

Market price

Бөлім №	Сипаттама	Қор	Бағасы
ADC3241IRGZR DISTI # ADC3241IRGZR-ND	ANALOG TO DIGITAL CONVERTERS - A RoHS: Compliant Min Qty: 2500 Container: Tape & Reel (TR)	Temporarily Out of Stock	2500:$16.8865
ADC3241IRGZR DISTI # ADC3241IRGZR	ADC Dual Pipelined 25Msps 14-bit LVDS/Serial 48-Pin VQFN T/R (Alt: ADC3241IRGZR) RoHS: Compliant Min Qty: 1 Container: Tape and Reel	Europe - 0	1:€21.1900 10:€20.0900 25:€19.0900 50:€18.2900 100:€17.3900 500:€16.6900 1000:€15.9900
ADC3241IRGZR DISTI # ADC3241IRGZR	ADC Dual Pipelined 25Msps 14-bit LVDS/Serial 48-Pin VQFN T/R - Tape and Reel (Alt: ADC3241IRGZR) RoHS: Compliant Min Qty: 2500 Container: Reel	Americas - 0	2500:$19.3900 5000:$18.4900 10000:$17.7900 15000:$17.1900 25000:$16.7900
ADC3241IRGZT DISTI # 595-ADC3241IRGZT	Analog to Digital Converters - ADC Dual-Channel, 14-Bit, 25-MSPS Analog-to-Digital Converter (ADC) 48-VQFN -40 to 85 RoHS: Compliant	0	250:$21.3500
ADC3241IRGZR DISTI # 595-ADC3241IRGZR	Analog to Digital Converters - ADC Dual-Channel, 14-Bit, 25-MSPS Analog-to-Digital Converter (ADC) 48-VQFN -40 to 85 RoHS: Compliant	0	2500:$18.5000
ADC3241IRGZ25 DISTI # 595-ADC3241IRGZ25	Analog to Digital Converters - ADC ADC3241 Evaluation Module RoHS: Not compliant	0

Қосымша тауарлар

Сурет

Бөлім №

Сипаттама

Mfr.#: ADC3241EVM

OMO.#: OMO-ADC3241EVM

Data Conversion IC Development Tools ADC3241EVM

Mfr.#: ADC3241EVM

OMO.#: OMO-ADC3241EVM-TEXAS-INSTRUMENTS

EVAL MODULE ADC3241

Қол жетімділік

Қор:: Available
Тапсырыс бойынша:: 2000
Саны енгізіңіз:

ADC3241IRGZR ағымдағы бағасы тек анықтама үшін берілген, егер сіз ең жақсы бағаны алғыңыз келсе, сату тобымызға [email protected] мекенжайына сұрауды немесе тікелей электрондық поштаны жіберіңіз.

-ден бастаңыз

ADC3241I 3
ADC3241 4
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ADC3241IRGZR

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Vacuum Packaging with PL

Step2:
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